Tailoring nitrogen profile in silicon oxynitride using rapid thermal annealing with ammonia under ultra-low pressure

ABSTRACT

A method of forming a dielectric film that includes nitrogen. The method includes incorporating nitrogen into a dielectric film using a nitridation gas and a rapid thermal annealing process, wherein an ultra-low pressure of equal to or less than about 10 Torr is used for the rapid thermal annealing process.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is a divisional of U.S. patent application Ser. No.10/772,893 filed Feb. 4, 2004, which claims the benefit of U.S.Provisional Patent Application No. 60/445,281 filed Feb. 4, 2003, theentire contents of which are hereby incorporated by reference herein.

BACKGROUND

1). Field

The present invention relates generally to the field of semiconductormanufacturing. More specifically, the present invention relates to amethod of forming a silicon oxynitride (SiON or SiO_(x)N_(y)) gatedielectric and integrating it into a gate stack using Rapid ThermalProcess (RTP).

2). Description of the Related Art

Integrated circuits are made up of literally million of active andpassive devices such as transistors, capacitors and resistors. Atransistor 100 generally includes a source 102, a drain 104, and a gatestack 106. The gate stack (FIG. 1) consists of a substrate 108 (e.g.,typically made of silicon) on top of which is grown a dielectric 110(typically made of silicon dioxide (SiO₂)) and this is capped with anelectrode 112 (made with a conductive material such as polycrystallinesilicon).

In order to provide more computational power, the trend is to scale downtransistors by shrinking device geometry. Moore's law scaling requiresthat the gate drive current must increase in order to increase the speedof the transistor. The gate drive current give by equation (1) can beincreased by increasing the gate capacitance (C_(ox)), which in turn (asshown by equation (2)) can be increased by either decreasing thedielectric thickness (d) or using a dielectric that has higherdielectric constant (k) than the existing SiO₂ dielectric (k=3.9).

$\begin{matrix}{I_{D}\text{\textasciitilde}\mu \text{/}{Lg}*{C_{ox}( {V_{DD} - V_{TH}} )}^{2}} & (1) \\{C_{ox} = \frac{kA}{d}} & (2)\end{matrix}$

where I_(D) is the Drive Current; μ is the Carrier Mobility, Lg is thegate length, C_(ox) is the Gate Capacitance, V_(DD) is the OpeningVoltage; V_(TH) is the Threshold Voltage; k is the dielectric constant,d is the dielectric thickness, and A is the device area.

To avoid complex integration and materials handling issues, devicemanufacturers would like to scale the device parameters as much as theycan by decreasing the dielectric thickness. However lowering the SiO₂thickness below 20 Å results in poor gate reliability due to increase intunneling current, increase in boron penetration into the substrate andpoor process control for very thin oxide. While in theory thealternative of using a higher k gate dielectric appears very attractive,the material compatibility with the underlying Si substrate and thepolysilicon gate electrode cannot be matched to what is provided withSiO₂. Additionally, using SiO₂ eliminates many materials handlingcontamination issues that must be dealt with when introducing rare-earthoxide as gate dielectrics.

Challenges encountered in extending SiO₂ to 0.1 μm technology node andbeyond, include (1) boron penetration in a transistor such as a PMOSdevice with a P+ boron (B) doped gate electrode into the gate oxide andunderlying Si substrate. And, (2) increasing gate leakage current withdecreasing gate oxide thickness.

Nitridation of the SiO₂layer to form silicon oxynitride (SiO_(x)N_(y) oralternatively SiON) has evolved as a promising candidate to scale theSiO₂ dielectric down to 0.1 device generations. Incorporating nitrogeninto the dielectric film blocks boron as well as increases thedielectric constant of the gate dielectric. The increase in thedielectric constant means a thicker dielectric can be used in comparisonto pure SiO₂ hence reducing gate leakage. For the nitrogen (N) doping tobe effective in circumventing the challenges described above inultra-thin (e.g., 12 Å) gate dielectrics, it is essential to have high(≧5%) total concentration of nitrogen in the dielectric film with thepeak of the nitrogen concentration profile at the top surface of thegate dielectric.

Traditionally, thermal processes have been carried out in furnaces thatprocess multiple wafers (5-100) at once. The furnaces have large volumesand it is difficult to pump out this huge volume. This coupled with thefact that the growth rate of most of the thermal processes goes downwith decrease in process pressure has resulted in thermal processesusually being carried out at atmospheric (760 Torr) or slightly belowatmospheric (>500 Torr) pressure.

Thermally grown silicon oxynitride has been used as gate dielectrics forseveral years from the 0.2 μm to 0.13 μm device generations. As thedevice technology has advanced from 0.2 μm to 0.1 μm the gate oxide hasthinned from >25 Å to <12 Å. Hence, in order to block boron and reducegate leakage the amount of nitrogen in the film has to be increased from<3% to 5-10%. When nitric oxide (NO) and nitrous dioxide (N₂O) are usedto grow the oxynitride gate dielectric the N gets incorporated in thedielectric film simultaneously as the oxynitride grows, hence nitrogenis distributed evenly in the film. If NO or N₂O are used to form siliconoxynitride by annealing an existing SiO₂ layer at elevated temperatures,the nitrogen incorporated by growing SiON at the Si-substrate/Oxideinterface. Hence, nitrogen is incorporated at this interface. The amountof nitrogen in the later case (<2%) is less than in the former case(4-5%).

Silicon oxynitride grown directly with N₂O or formed by annealing anSiO₂ film with N₂O has been the favored candidate for higher technologygenerations (0.2 μm) devices. The <2% nitrogen in the film wassufficient to enhance the device performance with >25 Å thick gatedielectric. As the device technology advanced to 0.13 μm, the nitrogenin the film had to be increased from <2% to 4-5% by using NO directgrowth or NO anneal, in order to reduce the leakage current incomparison to the undoped SiO₂ and prevent boron from diffusing throughthe thinner dielectric into the substrate. The amount of nitrogenincorporated by either one of these techniques is insufficient and thenitrogen concentration profile is inappropriate for extending SiON to0.1 μm device generation as explained earlier. Lowering the processpressure would only reduce the rate of nitrogen incorporation into thefilm, hence the nitridation processes continued to be carried out atelevated pressures.

More recently, plasma nitridation has been used to nitride (toincorporate nitrogen into) the gate oxide. This technique results inhigh nitrogen concentration at the poly gate/oxide interface, whichprevents boron penetration into the oxide dielectric. At the same time,the bulk of the oxide dielectric gets lightly doped with unassociatednitrogen during the plasma nitridation process, which reduces theelectrical oxide thickness (EOT) over the starting oxide. The plasmanitridation process requires plasma hardware that can among other thingscause metal contamination and plasma damage to the device and isdifficult to maintain as compared to the traditional thermal processinghardware optimized for the front end processing. The challenges thatplasma nitridation currently faces is scaling of device parametersElectrical Oxide Thickness (EOT) to <11 Å, Mobility degradation andlowering of Drive Current (Idsat) with ultra-thin dielectric (startingoxide <10 Å) for high performance application.

Another more recently adopted option has been thermal ammonia (NH₃)anneal which has been demonstrated to incorporate nitrogen in the excessof 5% and under certain process conditions can result in higher nitrogencontent at the surface of the dielectric than at the interface. Thischemistry however has not been as popular as the NO or N₂O chemistriesfor several reasons. The NH₃ chemistry was production worthy when usingfurnaces for the thermal nitridation, as O₂ or moisture (H₂O)contamination even at the ppm level can prevent the incorporation ofnitrogen in the film or give inconsistent results. In the case offurnace processing during the loading of wafers, large volumes of airand moisture enters the furnace which takes considerable amount of timeto be removed resulting in inconsistent incorporation of nitrogen in thefilm in the wafers from the edge of the furnace to the center of thefurnace. Unlike the NO and N₂O chemistries, NH₃ anneal results inhydrogen incorporation in the dielectric which results in hot electronsand results in device reliability issues. It has been shown that thehydrogen in the silicon oxynitride film can be eliminated by a postnitridation anneal at elevated temperatures for short times in eitherinert (N₂ or Ar) or O₂ ambient.

With the advent of Rapid Thermal Processing (RTP) and its integrationwith other process chambers in a cluster type tool, the NH₃ process hasbecome production worthy since the film can be efficiently nitrided in acontrolled ambient without an O₂ or H₂O contamination as well ashydrogen in the film can be eliminated by RTP anneal. However theproblems of the interfacial peak still remain. In the existing art, abase oxide SiO₂ film (grown in a single wafer RTP chamber or a furnace)is subjected to ambients containing either pure NH₃ or mixture of NH₃and inert gas (N₂ or Ar) at elevated temperatures (>850° C.) andatmospheric (760 Torr) or sub atmospheric (>500 Torr) pressures. It hasbeen observed, however, that this results in a bimodal distribution ofnitrogen within the starting SiO₂ film, with one nitrogen peak at thesilicon oxynitride surface (or sometimes at the polysilicon cap/siliconoxynitride interface) and a second peak at the siliconoxynitride/substrate interface. Such bimodal distribution has beenobserved even at reaction pressures as low as 100 Torr. The first peakis responsible for imparting good electrical properties to the devicesuch as boron blocking and increasing the dielectric constant, therebydecreasing the leakage current in the device as compared to the startingoxide of similar electrical thickness. The second peak on the other handimparts poor interfacial properties to the gate stack resulting inlarger threshold voltage shifts and mobility degradation of chargecarriers in the transistor.

The kinetics of thermal nitridation of gate oxide with NH₃ has beenstudied for 80-100 Å gate oxides. For the silicon oxynitride dielectricfilm to be useful in the 0.1 μm device technology node and beyond thethickness has to be <25 Å in the low leakage transistor devices and <12Å for high performance transistors. The high pressure NH₃ processcurrently used for the silicon oxynitride formation will cause a highconcentration of nitrogen at the silicon oxynitride/substrate interfaceresulting in poor device performance, limiting the scaling of thisprocess at 0.1 μm technology and beyond.

SUMMARY

The current method of incorporating nitrogen into a dielectric film suchas SiO₂ is not effective for forming an ultra-thin silicon oxynitride(SiON or SiO_(x)N_(y)) film with NH₃ and integrating into a gate stackto scale for use in the advanced technology nodes of 0.1 device andbeyond for both high performance and low leakage applications. As willbe apparent from the below, embodiments of the present inventionfulfills this long-standing need and desire in the art.

According to an aspect of the invention, a method of forming adielectric film includes incorporating nitrogen into a dielectric filmusing a nitridation gas and a rapid thermal annealing process. Anultra-low pressure of equal to or less than about 10 Torr is used forthe rapid thermal annealing process.

According to another aspect of the invention, a method of forming a gatestack includes forming a silicon dioxide film on a substrate. Nitrogenis then incorporated into a silicon dioxide film using a rapid thermalannealing process and a nitridation gas, wherein the rapid thermalannealing process occurs at about or less than about 10 Torr. After thenitrogen is incorporated, the silicon dioxide film becomes a siliconoxynitride film. The rapid thermal annealing process is continued withthe nitridation gas for a sufficient amount of time for nitrogen to beincorporated into the silicon dioxide film to form the siliconoxynitride with a nitrogen concentration of about or more than 5%. A caplayer is formed on the silicon oxynitride.

According to another aspect of the invention, a method of forming a gatestack includes incorporating nitrogen into a silicon dioxide film usinga nitridation gas and a rapid thermal annealing process. An ultra-lowpressure of equal to or less than about 10 Torr is used for the rapidthermal annealing process. The incorporating of nitrogen into thedielectric film forms a silicon oxynitride film. The silicon oxynitridefilm is post-annealed after a sufficient amount of nitrogen isincorporated into the silicon dioxide film for form the siliconoxynitride.

BRIEF DESCRIPTION OF THE DRAWINGS

Embodiments of the present invention is illustrated by way of examplesand not limitations in the figures of the accompanying drawings, inwhich like references indicate similar elements and in which:

Table 1 compares various ways of incorporating nitrogen into a silicondioxide film;

FIG. 1 illustrates an exemplary transistor;

FIG. 2 illustrates a nitrogen concentration profile when a siliconoxynitride film is formed by a rapid thermal annealing (RTA) process inthe presence of ammonia (NH₃) and high pressure (e.g., about 100 Torrand above);

FIGS. 3A-3E illustrate the effect of reducing pressure on a nitrogenconcentration profile when a silicon oxynitride film is formed by arapid thermal annealing (RTA) process in the presence of ammonia (NH₃);

FIGS. 4A-4C illustrate the effect of processing temperature on anitrogen concentration profile when a silicon oxynitride film is formedby a rapid thermal annealing (RTA) process in the presence of ammonia(NH₃) and ultra-low pressure (e.g., about less than or equal to 10Torr);

FIG. 5A-5C compares the nitrogen concentration profile of a siliconoxynitride film formed by using plasma nitridation and by using RTA withNH₃; and

FIG. 6 illustrates cluster tool that can be used for some of theembodiments of the present invention.

DETAILED DESCRIPTION

Embodiments of the present invention includes a novel method of forminga dielectric film that includes nitrogen, such as SiON or SiO_(x)N_(y),using a rapid thermal annealing process with ammonia and an ultra-lowprocessing pressure (e.g., about equal to or less than 10 Torr). In thefollowing description, for purposes of explanation, numerous specificdetails are set forth in order to provide a thorough understanding ofthe present invention. It will be evident, however, to one skilled inthe art that the present invention may be practiced without thesespecific details. In other instances, specific apparatus structures andmethods have not been described so as not to obscure the presentinvention. The following description and drawings are illustrative ofthe invention and are not to be construed as limiting the invention.

In one embodiment, there is provided a method of forming a siliconoxynitride dielectric film using a rapid thermal annealing process withthe presence of NH₃ referred to herein as RTA-NH₃. The processingpressure for forming the silicon oxynitride film is an ultra-lowpressure (about equal to or less than 10 Torr). In addition, varying theprocessing pressure allows for the tailoring of the amount anddistribution of nitrogen in the silicon oxynitride film.

In another embodiment, there is provided a method of integrating thesilicon oxynitride film, (SiON film or SiO_(x)N_(y) film) formed usingthe RTA-NH₃ process into a gate stack for forming a transistor.

In one embodiment, a substrate having a silicon dioxide (SiO₂) filmformed there on is subjected to ammonia gas in a single wafer rapidthermal processing (RTP) chamber configured to carry out the rapidthermal annealing (RTA) process. The substrate can be a monocrystallinesilicon wafer or a silicon wafer typically used in the art for makingsemiconductor devices. The SiO₂ film may have a thickness about lessthan 30 Å in one embodiment. In one embodiment, the ammonia gas flowinto the RTP chamber ranges from about 100 sccm to 5 slm. It is to beappreciated that the gas flow may vary depending on the size of theprocessing chamber. For instance, the gas flows mentioned above are fora 200 mm single wafer reactor chamber. The gas flows may beproportionately increased for a 300 mm single wafer reactor chamberowing to the increase in the reactor volume. In one embodiment, theprocessing temperature ranges from 900-1100° C. and the processingpressure is about equal to or less than 10 Torr, or alternatively, mayranges from 0.010 Torr to about 10 Torr. The process uses either pureammonia or ammonia diluted with an inert gas such as Argon or Nitrogen.An SiON or SiO_(x)N_(y) is formed as a result.

In one embodiment, a commercially available reduced pressure RTP chamberhardware such as XE, XE Plus or Radiance made by Applied Materials, Inc.is used to carry out the RTA-NH₃ process to form the SiON orSiO_(x)N_(y) film. Such reduced pressure RTP chamber provides anultra-low processing pressure (e.g., 1 Torr or less than 10 Torr) forthe forming of the SiON or SiO_(x)N_(y) using RTA-NH₃. In oneembodiment, a turbo pump can be connected or added to the RTP chamber toassist in lowering the total pressure of the RTP chamber to about 0.010Torr (or 10 mTorr).

It is observed that when the SiON or SiO_(x)N_(y) film is formed by RTAin the presence of ammonia and at high pressure (e.g., 100 Torr), thenitrogen concentration profile in the SiON or SiO_(x)N_(y) film asdetermined by a method called Time-of-Flight Secondary Ion MassSpectrometry (TOF-SIMS) indicates that the nitrogen concentrationprofile has two peaks 202 and 204 as shown in FIG. 2. The first peak 204indicates that the nitrogen concentration is high (about 4×10²¹ units)at the oxide surface and the second peak 202 indicates that there isalso a significant amount of nitrogen concentration (about 4×10²¹ units)at the substrate interface.

It is discovered by the inventors that changing the process conditionsuch as processing pressure, temperature, and time can change the ratioof the intensities of these two peaks 204 and 202. As shown in FIGS.3A-3E, the process pressure has a high impact on the ratio of the peak202 and 204 intensities. As shown in FIGS. 3A-3E, when the pressure isreduced from 100 Torr to 0.250 Torr at a fixed temperature of 1000° C.,the second peak 202 at the substrate interface disappears completely. Ascan be seen from FIG. 3A, when the SiON or SiO_(x)N_(y) film is formedusing RTA-NH₃ with a pressure at about 100 Torr, two peaks 202 and 204are present. In FIG. 3B, when the SiON or SiO_(x)N_(y) film is formedusing RTA-NH₃ with a pressure at about 10 Torr, the peak 202 isdecreasing indicating that the nitrogen concentration at the substrateinterface is decreasing. Similarly, as shown in FIGS. 3C-3E, the peak202 is decreasing until it is substantially eliminated at a processpressure of about 0.25 Torr.

Additionally, increasing temperature while forming the SiON orSiO_(x)N_(y) film at an ultra-low pressure (e.g., about equal to or lessthan 10 Torr) enhances the nitrogen concentration peak 204 at thesurface as shown in FIGS. 4A-4C. For instance, in FIG. 3B, when thenitridation used to form the SiON or SiO_(x)N_(y) film is done using theRTA-NH3 at about 10 Torr and about 1000° C., the peak 204 is at about3.2×10²¹ concentration units. In FIG. 4C, when the nitridation used toform the SiON or SiO_(x)N_(y) film is done using the RTA-NH3 at about 10Torr and about 1100° C. (100° C. higher) the peak 204 is at about 6×10²¹concentration units.

Thus, it is optimal to form the SiON or SiO_(x)N_(y) film at anultra-low pressure (about ≦10 Torr) and high temperature (≧1000-1100°C.). Having a high nitrogen concentration at the first peak 204 (at thesurface of the SiON or SiO_(x)N_(y) film) and a low or substantiallyminimal nitrogen concentration at the substrate interface provides anideal profile for an ultra-thin gate dielectric for advanced ≦0.1 μmtechnology nodes.

At low pressure, the nitrogen concentration dose in the SiON orSiO_(x)N_(y) film can also be adjusted by changing the temperature oralternatively, by changing the process time while keeping the processingtemperature fixed. For example, a similar quality SiON or SiO_(x)N_(y)film is formed by nitridating a 6 Å silicon dioxide using the RTA-NH₃process either at about 1000° C., 10 Torr, for 10 second or at about1000° C., 1 Torr, for 45 second. Thus, lowering the pressure at aconstant temperature requires increasing the time to achieve the samenitrogen dose in a film of equivalent thickness.

FIG. 5 compares the nitrogen concentration profile for SiON orSiO_(x)N_(y) film manufactured using a plasma nitridation process withRTA-NH₃ process. In one embodiment, the plasma nitridation process usedis Decoupled Plasma Nitridation (DPN) which is known in the art. DPN isa technology using inductive coupling to generate nitrogen plasma andincorporate a high level of nitrogen onto an oxide film. DPN allowsformation of the silicon oxynitride film with less nitrogen at theoxide/substrate interface and higher nitrogen concentration at the oxidesurface. In DPN, a surface, e.g., an SiO₂ film, is bombarded withnitrogen ions which break the SiO₂ film and bond the nitrogen ions tothe SiO₂ film forming an SiON or SiO_(x)N_(y) film. The SiO₂ film isthus exposed to decoupled nitrogen plasma. In one embodiment, DPN isperformed in a chamber with pressure ranging from about 5-20 mTorr orless than 10 Torr, in the presence of nitrogen gas with a flow rateranging from about 100-200 sccm and plasma power of about 300 Watt. TheDPN process parameters can be modified depending on the chamber size andvolume thickness of the dielectric film as is known in the art. The PDNyields an SiON or SiO_(x)N_(y) film that does not have a second peak 202at the substrate interface. In addition, in both processes, the DPN andthe RTA-NH₃ processes, the SiON or SiO_(x)N_(y) film is characterized byhaving the greatest concentration of nitrogen (N_(y)) at the top surfaceof the dielectric film, with “y” decreasing with depth. However, thetail of the nitrogen concentration profile for the DPN process seems tobe extended closer to the Si substrate than the RTA-NH₃ process carriedout at an ultra low processing pressure as shown in FIGS. 5B-5C. Thiswill be reflected in the increased drive current of the device thatincorporates the SiON or SiO_(x)N_(y) film formed using the RTA-NH₃process than that of the SiON or SiO_(x)N_(y) film formed using theplasma nitridation process. In addition, the SiON or SiO_(x)N_(y) filmformed using the RTA-NH₃ process will also be free of unassociatednitrogen. Another advantage of the RTA-NH₃ process over the DPN processis that is uses the same RTP reactor that has been developed andoptimized for the front end anneals and SiO₂ growth. The RTP chamber hasbeen optimized for ultra low metal contamination and issues that wouldeliminate or minimize any impact to the device integrity andreliability.

In one embodiment, the gate stack containing the RTA-NH₃ processed SiONor SiO_(x)N_(y) film is manufactured in a cluster tool, such as anintegrated Gate Stack Centura made by Applied Materials, Inc., is usedto form a gate that has the SiON or SiO_(x)N_(y) film formed aspreviously described for improved device performance. An example ofcluster tool is shown in FIG. 6.

FIG. 6 illustrates a cluster tool 600, which comprises severalprocessing chambers, e.g., loadlock chambers 602 and 604, RTP chambers606, 608, 610, a deposition chamber 612 (e.g., for depositing apolysilicon film), and a cool down chamber 614. The cluster tool 600also includes a wafer-handling tool 616 used to transfer a substrate 618(e.g., wafer) in and out of particular processing chamber. Thewafer-handling tool 616 is typically located in a transfer chamber thatcan communicate to all of the processing chambers. The loadlock chambers602 and 604 house substrates (e.g., wafers) to be processed. Thedeposition chamber 612 can be conventional chemical or physical vapordeposition that can be used to form a film or a layer as is known in theart. In one embodiment, the deposition chamber 612 is a depositionchamber that can be configured to form a polysilicon film or otherelectrode film. The chambers 606, 608, and 610 are chambers that can beconfigured to run a rapid thermal annealing (RTA) process at a reducedor ultra-low pressure (e.g., about equal to or less than 10 Torr). Anyone of the chambers 606, 608, and 610 can be used to perform the RTA-NH₃process previously described to form an SiON or an SiO_(x)N_(y) film.

In one embodiment, an SiO₂ dielectric film with a physical thickness ofabout 4-15 Å is grown using a reduced pressure RTP chamber such as theRTP chamber 606 of the cluster tool 600 (FIG. 6). The SiO₂ dielectricfilm can be formed by a rapid thermal oxidation which is an oxidationprocess where the chamber uses lamp(s) to quickly heat and dry asubstrate surface to form an oxidized layer in the presence of oxygen.The rapid thermal oxidation of a silicon substrate (or a wafer) can becarried out using a dry process rapid thermal oxidation with thepresence of O₂, O₂+N₂, O₂+Ar, N₂O, or N₂O+N₂ gas mixtures. The gas orgas mixtures can have a total flow rate of about 1-5 slm. Alternatively,the rapid thermal oxidation of a silicon substrate can be carried outusing a wet process such as In-Situ Steam Generation (ISSG) with thepresence of O₂+H₂, O₂+H₂+N₂, or N₂O+H₂ having, for example, a total flowrate of about 1-5 slm with 1-13% H₂. In one embodiment, the rapidthermal oxidation process to form the SiO₂ dielectric film is formed ata processing temperature of about 800-1000° C. and a processing pressureof about 0.5-50 Torr for about 5-90 seconds which results in a SiO₂dielectric film having a thickness in the range of 4-15 Å.

In one embodiment, after the SiO₂ dielectric film is formed in the RTPchamber 606, the substrate is transferred to another RTP chamber, e.g.,the RTP chamber 608 of the cluster tool 600 under an inert (e.g., N₂ orAr) environment with the transfer chamber pressure being less than orabout 10 Torr to incorporate nitrogen into the SiO₂ dielectric film toform an SiON or SiO_(x)N_(y) film. The RTP chamber 608 can be a reducedpressure chamber reactor such as an Applied Material reactor XE, XEPlus, or Radiance. The RTP chamber 608 is configured to have NH₃, N₂, orAr gases plumbed to it to form an SiON or SiO_(x)N_(y) as previousdiscussed. In one embodiment, the substrate with the SiO₂ dielectricfilm is heated to an elevated temperature of about 900-1100° C. with aflow of pure NH₃ or NH₃+Inert gas (e.g., N₂ or Ar) into the processingchamber, e.g., the RTP chamber 608. The pressure in the chamber isreduced to less than or about equal to 10 Torr. The SiON or SiO_(x)N_(y)formed under this condition can have a profile similar to those shown inFIGS. 3C-3D. The SiON or SiO_(x)N_(y) has a nitrogen concentration equalto or great than 5%. The peak concentration of the nitrogen within theSiO₂ film occurs at the top surface of the SiO₂ film.

In one embodiment, the SiON or SiO_(x)N_(y) film is subjected to a postnitridation annealing (PNA) process in another RTP chamber such as theRTP chamber 610 of the cluster tool 600 (FIG. 6). The PNA processchemistry can either be pure N₂ or O₂+N₂ gas mixtures. In the event of apure N₂ chemistry, the PNA can be carried out in the same RTP chamber,(e.g., the RTP chamber 600) as the RTA-NH₃ process that is used to formthe SiON or SiO_(x)N_(y) film. In one embodiment, the PNA includesheating up the substrate having the SiON or the SiO_(x)N_(y) film to anelevated temperature of 1000-1100° C. at less than or equal to about 5Torr total pressure. In one embodiment, pure N₂ gas of about 1 slm isflown into the RTP chamber (e.g., the RTP chamber 608 or 610) for about60 seconds. Follow the N₂ flow, O₂ or O₂+N₂ gas mixture at about 1 slmtotal flow rate is flown into the RTP chamber for about 15 seconds. Itis to be appreciated the flow rates mentioned are examples only for aparticular reactor or processing chamber size (e.g., a 200 mm reactor).The flow rates are proportionately adjusted (increased or decreased) forother size reactors owing to the difference in volume.

In one embodiment, following the PNA process, the nitrogen containinggate dielectric (the SiON or SiO_(x)N_(y)) film is capped with aconductive layer such as a polysilicon film. The polysilicon film can beformed in a deposition chamber such as the deposition chamber 612 of thecluster tool 600 (FIG. 6). This completes the formation of the gatestack. The substrate can then be transferred to a cool down chamber suchas the cool down chamber 614 and then be transferred to a storage areasuch as the loadlock 614 for further processing, testing, or otherprocesses as known in the art.

It is to be appreciated that the gate stack that includes the gatedielectric film and the polysilicon cap film can be formed in oneprocessing chamber or several processing chambers besides the clustertool 600 previously described. For instance, the SiO₂ dielectric filmcan be formed first in one chamber. Then, the same chamber is adjustedfor the rapid thermal annealing at the ultra low pressure to perform thenitridation process to form the SiON or SiO_(x)N_(y) film. Then the samechamber can be adjusted to perform the PNA for the SiON or theSiO_(x)N_(y) film. And, the polysilicon film is formed over SiON orSiO_(x)N_(y) film in the same chamber.

A transistor formed with the gate stack as described herein hasoptimized performance due to the continuous and uniform processingenvironment or ambient owing to the use of the cluster tool 600, in oneembodiment. The processing of the gate stack is formed without a breakbetween any of the processes. Thus, better scaling in terms of reducedElectrical Oxide Thickness, leakage, or Drive Current can be achieved ascompared to processes with breaks in between various processes.

Table 1 summarizes the various processes of incorporating nitrogen intoan SiO₂ film including conventional processes as well as process of theexemplary embodiments of the present invention. Table 1 illustrates thatincorporating nitrogen into the SiO₂ film using exemplary embodiments ofthe present invention gives superior nitrogen concentration profile. Inaddition, as mentioned above, the exemplary embodiments of the presentinvention allow one to tailor the nitrogen concentration profile toachieve an optimum SiON or SiO_(x)N_(y) film for a particularapplication.

As shown in Table 1, when the nitridation process is carried out usingNO or NO+O₂ gas mixture using a mixture growth process to thermally growthe SiON or SiO_(x)N_(y) film. The nitrogen concentration ([N]) profileis incorporated throughout the SiO₂ film with a high nitrogenconcentration at the substrate interface. When the nitridation processis carried out using N₂O anneal using a conventional process, thenitrogen is incorporated close to the Si substrate-SiO₂ interface.Further, the nitrogen concentration incorporated is insufficient toblock boron into the dielectric film or reduce leakage in 0.1 μmdevices. When the nitration process is carried out using NO anneal usinga conventional process, the nitrogen is incorporated at the Sisubstrate-SiO₂ interface with the nitrogen concentration being slightlyhigher compared to the N₂O anneal process. However, it has been observedthat boron tends to be trapped inside the SiO₂ film resulting in poorinterfacial properties and not significant reduction in current leakage.

When the nitridation process is carried out using an NH₃ annealingprocess at high pressure that is equal to or greater than 100 Torr as iscurrently practiced in the art, the nitrogen is incorporated into theSiO₂ film with a bimodal nitrogen concentration distribution. Aspreviously discussed, the nitrogen concentration profile includes anitrogen peak at the surface of the film and a nitrogen peak at thesubstrate-SiO₂ interface. The nitrogen concentration is higher in theNH₃ annealing process at high pressure than the NO annealing process.Nitrogen at the surface of the film tends to trap boron but nitrogen atthe substrate SiO₂ interface causes poor interfacial propertiesresulting in larger threshold voltage shifts and mobility degradation ofcharge carriers in the transistor. When the nitridation process iscarried out using plasma nitridation, as acceptable nitrogenconcentration profile is produced. High nitrogen concentration occurs atthe surface of the SiO₂ film. Nitrogen at the surface can block theboron. Plasma nitridation allows for ultra-thin dielectric film forming(<10 Å) but is shown to cause drive current to degrade at suchultra-thin film.

When the nitridation process is carried out using an RTA NH₃ process atultra-low pressure (e.g., Torr), of the exemplary embodiments of thepresent invention, the nitrogen concentration profile has high nitrogenconcentration at the surface of the SiO₂ film and no bimodaldistribution. Also, the RTA-NH₃ process at the ultra-low pressure allowsfor Electrical Oxide Thickness scaling to less than 11 Å.

Although it has been describe that ammonia (NH₃) is used in many of theexemplary embodiments, it is to be appreciated that any nitrodizing ornitridation gas can be used or substituted for ammonia. For example, NOor N₂O can be used to form the SiON or SiO_(x)N_(y) using a rapidthermal annealing process at an ultra-low pressure (e.g., equal to orless than about 10 Torr). The discussion of the features of theembodiments using the RTA-NH₃ at ultra-low pressure is thus similarlyapplicable for nitridation process using other suitable nitrodizing ornitridation agents (e.g., NO and N₂O ) using RTA at ultra-low pressure.

While certain exemplary embodiments have been described and shown in theaccompanying drawings, it is to be understood that such embodiments aremerely illustrative and not restrictive of the current invention, andthat this invention is not restricted to the specific construction andarrangements shown and described since modification may occur to thoseordinary skilled in the art.

In one embodiment, the entire gate stack from the gate oxide formationto the N doping of the dielectric layer and gate electrode formation ismanufactured within as single tool with multiple chambers (e.g., thecluster tool) without breaking vacuum. Advance technology nodes (≦0.1μm) will have a few monolayers of oxide film as gate dielectric.Processing the gate stack within a single tool with controlled ambientwithout vacuum break and human handling/interference will eliminate anycompromise to the device integrity as a result of contamination ordamage from exposure to the processing ambient and handling of the wafermultiple times.

While certain exemplary embodiments have been described and shown in theaccompanying drawings, it is to be understood that such embodiments aremerely illustrative and not restrictive of the current invention, andthat this invention is not restricted to the specific constructions andarrangements shown and described since modifications may occur to thoseordinarily skilled in the art.

TABLE 1 Nitridation [N] Explanation of Process Profile the profileComments NO or NO + O₂ Mixture Growth

N Incorporated throughout the film Poor device performance due to high[N] at the substrate interface N₂O Anneal

N close to Si/SiO₂ interface [N] Content insufficient to block Boron orreduce leakage in 0.1 μm devices NO Anneal

N at the Si/SiO2 interface [N] higher than N₂O anneal. Traps B insideSiO₂. Poor interfacial properties and not significant reduction inleakage current NH₃ Anneal (High Pressure ≧100 Torr)

Bimodal [N] distribution. N at the surface & substrate interface [N]higher than NO anneal. N at surface traps Boron. Poor interfacialproperties Plasma Nitridation

High [N] at the poly/oxide interface [N] at the surface blocks theBoron. Drive current degrades for ultra-thin dielectrics (<10Å) NH3Anneal (Low Pressure ≦10 Torr)

Ideal profile. High [N] at the poly/oxide interface High Drive currentthan plasma nitridation. Allows EOT scaling <11Å.

1. A nitrogen-containing dielectric film, comprising: a dielectricmaterial; and a total amount of nitrogen incorporated into thedielectric material, the total amount of nitrogen having a concentrationpeak occurring at the top surface of the dielectric film.
 2. Thenitrogen-containing dielectric film of claim 1, wherein the total amountof nitrogen incorporated into the dielectric film has an atomicconcentration equal to or greater than 5% of the nitrogen-containingdielectric film.
 3. The nitrogen-containing dielectric film of claim 1,wherein the dielectric material has a thickness equal to or less thanabout 12 angstroms.
 4. The nitrogen-containing dielectric film of claim1, wherein the dielectric material is silicon dioxide (SiO₂).
 5. Thenitrogen-containing dielectric film of claim 1, wherein thenitrogen-containing dielectric film is a silicon oxynitride.
 6. A gatestack, comprising: a nitrogen-containing dielectric film comprising adielectric material and a total amount of nitrogen incorporated into thedielectric material, the total amount of nitrogen having a concentrationpeak occurring at the top surface of the dielectric film; and a caplayer disposed on the nitrogen-containing dielectric film.
 7. The gatestack of claim 6, wherein the total amount of nitrogen incorporated intothe dielectric film has an atomic concentration equal to or greater than5% of the nitrogen-containing dielectric film.
 8. The gate stack ofclaim 6, wherein the dielectric material has a thickness equal to orless than about 12 angstroms.
 9. The gate stack of claim 6, wherein thedielectric material is silicon dioxide (SiO₂).
 10. The gate stack ofclaim 6, wherein the nitrogen-containing dielectric film is a siliconoxynitride.
 11. A silicon oxynitride film wherein a nitrogenconcentration in the silicon oxynitride film is greatest at the topsurface of the film and decreasing with depth, and the siliconoxynitride film is free of unassociated nitrogen.
 12. The siliconoxynitride film of claim 11, wherein the nitrogen concentration is equalto or greater than 5%.
 13. The silicon oxynitride film of claim 11,wherein the silicon oxynitride film has a thickness equal to or lessthan about 12 angstroms.